Certain serial data bus protocols do not allow for more than one master device on the bus. In particular, the Inter Integrated Circuit bus offers multimaster capability and an arbitration procedure to help ensure that that only one master device controls the bus in the event two or more master devices seek to control the bus simultaneously. However, there are deficiencies in the current protocol to adequately handle communications with more than one master device. When a master mode device tries to communicate with a slave mode device, the slave mode device is not provided with information that identifies the master mode device. The lack of identification presents a problem because the slave mode device is unable to present data or commands to the master mode device in a format specific to the master mode device. Further, the various devices are constantly subjected to updates to remove bugs and otherwise improve performance. Currently, there is no means for the devices in slave mode to make other devices in master mode in communication aware of their version. Overall system efficiency is accordingly reduced.
Therefore, it would be desirable to provide a multimaster protocol for a serial data bus, especially an Inter Integrated Circuit bus.